The present invention relates to semiconductor devices, and more specifically, to thin body transistors and methods for fabricating the same.
In recent years, semiconductor devices have become highly integrated to achieve a combination of high-performance, a high-speed, and economic efficiency. However, as semiconductor devices become more highly integrated, a variety of operational and structural problems may arise. For example, as the channel length of a typical planar field effect transistor becomes shorter, short channel effects (such as punch-through) may occur, parasitic capacitance (i.e. a junction capacitance) between junction regions and the substrate may be increased, and leakage current may be increased.
To address some of the above problems, thin body field effect transistors using silicon-on-insulator (SOI) technology have been proposed. However, such devices may be susceptible to floating body effects, which may be caused by heat generated during device operation and/or an accumulation of high-energy hot carriers. In addition, a back bias voltage may not applied to compensate for changes in threshold voltage because of the insulator, so device performance may be affected. Also, problems associated with stress due to differences in thermal expansion coefficients between the substrate and the insulating layer may occur. Furthermore, since SOI field effect transistor technology may require connecting two substrates, processing costs may be increased and fabrication may become relatively complicated.